A Survey Addressing on High Performance On-Chip VLSI Interconnect

Authors

  • C. Mohamed Yousuff Department of Electronics and Communication Engineering, C. Abdul Hakeem College of Engineering and Technology, Melvisharam, Tamil Nadu, India
  • V. Mohamed Yousuf Hasan
  • M. R. Khan Galib Department of Electronics and Communication Engineering, C. Abdul Hakeem College of Engineering and Technology, Melvisharam, Tamil Nadu, India

Abstract

With the rapid increase in transmission speeds of communication systems, the demand for very high-speed lowpower VLSI circuits is on the rise. Although the performance of CMOS technologies improves notably with scaling, conventional CMOS circuits cannot simultaneously satisfy the speed and power requirements of these applications. In this paper we survey the state of the art of on-chip interconnect techniques for improving performance, power and delay optimization and also comparative analysis of various techniques for high speed design have been discussed.

Author Biography

V. Mohamed Yousuf Hasan

Department of Electronics and Communication Engineering, C. Abdul Hakeem College of Engineering and Technology, Melvisharam, Tamil Nadu, India

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Published

2015-07-03

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ARTICLES / PAPERS / General