A Modified Signal Feed-Through Pulsed Flip-Flop for Low Power Applications
Abstract
In this paper a modified signal feed-through pulsed flip-flop has been presented for low power applications. Signal feed-through flip-flop uses a pass transistor to feed input data directly to the output. Feed through transistor and feedback signals have been modified for delay, static and dynamic power reduction. HSPICE simulation shows 22% reduction in leakage power and 8% of dynamic power. Delay has been reduced by 14% using TSMC 90nm technology parameters. The proposed pulsed flip-flop has the lowest PDP (Power Delay Product) among other pulsed flip-flops discussed.References
H. Kawaguchi and T. Sakurai, "A reduced clock-swing flip-flop (RCSFF) for 63% power reduction," IEEE J. Solid-State Circuits, vol. 33, pp. 807–811, May 1998.
R. Burd, U. Salim, F.Weber, L. DiGregorio, and D. Draper H. Partovi, "Flow-through latch and edge-triggered flip-flop hybrid elements," in IEEE Tech. Dig. ISSCC, pp. 138–139, 1996.
F Klass, "Semi-dynamic and dynamic flip-flops with embedded logic," in Symp. on VLSI Circuits, Dig. of Tech. Papers, pp. 108–109, June 1998.
B. Nikolic et, "Sense amplifier-based flip-flop," Int. Solid-State Circuits Conf., Dig. of Tech, pp. 282–283, Feb. 1999.
M. Matsui et al., "A 200 MHz 13mm 2-D DCT macrocell using sense amplifying pipeline flip-flop scheme," IEEE J. Solid-State Circuits, vol. 29, pp. 1482–1490, 1994.
D. De Caro, E. Napoli, and N. Petra A. G. M. Strollo, "A novel high speed sense-amplifier-based flip-flop," IEEE Trans. Very Large Scale Integr. (VLSI) Syst., vol. 13, pp. pp. 1266–1274, Nov. 2005.
C. Amir, A. Das, K. Aingaran, C. Truong, R.Wang, A. Mehta, R. Heald, and G.Yee F. Klass, "A new family of semi-dynamic and dynamic flip flops with embedded logic for high-performance processors," IEEE J. Solid-State Circuits, vol. 34, pp. 712-716, May 1999.
G. Colon-Bonet, T. Fischer, R. Riedlinger, T. J. Sullivan, and T. Grutkowski S. D. Naffziger, "The implementation of the Itanium 2 microprocessor," IEEE J. Solid-State Circuits, vol. 37, pp. 1448–1460, Nov. 2002.
S. Narendra, Z. Chen, S. Borkar, M. Sachdev, and V. De J. Tschanz, "Comparative delay and energy of single edge-triggered and dual edge triggered pulsed flip-flops for high-performance microprocessors," in Proc. ISPLED, pp. 207–212, 2001.
S. Kim, and Y. Jun B. Kong, "Reduction, Conditional-capture flip-flop for statistical power," IEEE J. Solid-State Circuits, vol. 36, pp. 1263–1271, Aug. 2001.
M. Aleksic, and V. G. Oklobdzija N. Nedovic, "Conditional precharge techniques for power-efficient dual-edge clocking," n Proc Int. Symp.Low-Power Electron. Design, Monterey, pp. 56–59, 2002.
T. Darwish, and M. Bayoumi P. Zhao, "High-performance and low power conditional discharge flip-flop," IEEE Trans. Very Large Scale Integr. (VLSI) Systems, vol. 12, pp. 477–484, May 2004.
M. Hamada, T. Fujita, H. Hara, N. Ikumi, and Y. Oowaki C. K. Teh, "Conditional data mapping flip-flops for low-power and high-performance systems," IEEE Trans. Very Large Scale Integr. (VLSI) Systems, vol. 14, pp. 1379–1383, Dec. 2006.
J.-F. Lin, and M.-H. Sheu Y.-T. Hwang, "Low power pulse triggered flip-flop design with conditional pulse enhancement scheme," IEEE Trans. Very Large Scale Integr. (VLSI) Syst, vol. 20, pp. 361–366, Feb. 2012.
Jin-Fa Lin, "Low-Power Pulse-Triggered Flip-Flop Design Based on a Signal Feed-Through," IEEE Transactions on Very Large Scale Integration (VLSI) Systems , vol. 22, pp. 181 - 185, 2014.
D. Harris, Skew-Tolerant Circuit Design. San Francisco: CA: Morgan Kaufmann, 2001.
S. Kozu et al., "A 100 MHz 0.4W RISC processor with 200 MHz multiply-adder, using pulseregister technique," Proc. IEEE Intl. Solid-State Circuits Conf, pp. 140–141, 1996.
David Money Harris Neil H. E. Weste, CMOS VLSI Design:A Circuits and Systems Perspective, 4th ed.: Pearson Education , 2011.
W.-L. Goh, and K.-S. Yeo M.-W. Phyu, "A low-power static dual edge triggered flip-flop using an output-controlled discharge configuration," in Proc. IEEE Int. Symp. Circuits Syst, pp. 2429–2432, May 2005.
A. Khademzadeh, A. Afzali-Kusha, and M. Nourani S. H. Rasouli, "Low power single- and double-edge-triggered flip-flops for high speed applications," IEE Proc. Circuits Devices Syst., vol. 152, pp. 118–122, Apr. 2005.
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