Advanced High-Level Synthesis Techniques Based on Metamodel

Authors

  • Radoslaw Cieszewski Warsaw University of Technology
  • Ryszard Romaniuk Warsaw University of Technology
  • Krzysztof Poźniak Warsaw University of Technology
  • Maciej Linczuk Warsaw University of Technology

Abstract

This paper explores advanced techniques in highlevel synthesis (HLS) utilizing metamodel structures. Metamodels act as models of hardware models, generating internal hardware models based on parameter inputs and exploring the solution space to find optimal configurations. The focus is on enhancing HLS processes through metamodeling, enabling more efficient hardware design and optimization. Key contributions include a novel metamodel framework and a case study demonstrating its application in complex system designs. The proposed methods show significant improvements in synthesis efficiency and scalability, making them highly relevant for modern FPGA and ASIC design workflows.

Additional Files

Published

2024-10-29

Issue

Vol. 70 No. 4 (2024)

Section

VHDL, Hardware Intelligence

License

Copyright (c) 2024 International Journal of Electronics and Telecommunication

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