Design and Analysis of PTL based Reversible Logic Encoder Circuits for Low-Power Applications
Abstract
Gray codes are extensively used in modern digital systems to reduce errors occurring due to the sensitivity of binary transitions in communication and arithmetic circuits. This project discusses the design and implementation of a binary-to-Gray code converter using different XOR gate realizations and reversible logic gates to study performance and efficiency. Implementation of the converter using conventional XOR gates, XOR made from transmission gates (TG), Pass Transistor Logic (PTL) XOR, Feynman gate, Toffoli gate, and their PTL-based counterparts is presented. Synthesis and simulation for all designs are done using Cadence tools on 90 nm CMOS technology. Through comparative analysis, the implementations show that PTL-based Feynman gate implementation results in the least power dissipation, which is up to 90.15% lesser power consumption compared with the conventional XOR-based binary-to-gray code converter. The result implies that PTL and reversible logic represent an efficient alternative for low power and area-optimized design of digital circuits, suitable for modern VLSI applications.
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